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INTEGRATED CIRCUITS
DATA SHEET
74AVCH16244 16-bit buffer/line driver; 3.6 V tolerant; 3-state
Product Specification File under Integrated Circuits, IC24 2000 Mar 07
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
FEATURES * Wide supply voltage range from 1.2 to 3.6 V * Complies with JEDEC standard no. 8-1A/5/7 * CMOS low power consumption * Input/output tolerant up to 3.6 V * Dynamic Controlled Output (DCO) circuit dynamically changes the output impedance, resulting in noise reduction without speed degradation * Low inductance multiple VCC and GND pins to minimize noise and ground bounce * Supports Live Insertion * All data inputs have bus-hold. DESCRIPTION
74AVCH16244
The 74AVCH16244 is a 16-bit non-inverting buffer/line driver with 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The 3-state outputs are controlled by the output enable inputs nOE. A HIGH on nOE causes the outputs to assume a high impedance OFF-state. The 74AVCH16244 is designed to have an extremely fast propagation delay and a minimum amount of power consumption. To ensure the high-impedance output state during power-up or power-down, nOE should be tied to VCC through a pull-up resistor (Live Insertion). A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient (see Figs 1 and 2). The 74AVCH16244 has active bus-hold circuitry to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.
MNA506
handbook, halfpage
0
MNA507
handbook, halfpage
300
I OH (mA) 1.8 V -100
I OL (mA) 200 2.5 V 2.5 V
3.3 V
-200
100
1.8 V
3.3 V -300 0 0 1 2 3 VOH (V) 4 0 1 2 3 VOL (V) 4
Fig.1
Output voltage as a function of the HIGH-level output current.
Fig.2
Output voltage as a function of the LOW-level output current.
2000 Mar 07
2
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.0 ns. SYMBOL tPHL/tPLH PARAMETER propagation delay nAn to nYn CONDITIONS VCC = 1.2 V VCC = 1.5 V VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V CI CPD input capacitance power dissipation capacitance per buffer notes 1 and 2 outputs enabled outputs disabled Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; (CL x VCC2 x fo) = sum of outputs. 2. The condition is VI = GND to VCC. FUNCTION TABLE See note 1. INPUTS nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high impedance OFF-state. nAn L H X
74AVCH16244
TYP. 5.2 2.9 2.1 1.5 1.3 5.0 34 1 ns ns ns ns ns pF pF pF
UNIT
OUTPUTS nYn L H Z
2000 Mar 07
3
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
ORDERING AND PACKAGE INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE 74AVCH16244DGG PINNING PIN 1 2, 3, 5 and 6 4, 10, 15, 21, 28, 34, 39 and 45 7, 18, 31 and 42 8, 9, 11 and 12 13, 14, 16 and 17 19, 20, 22 and 23 24 25 26, 27, 29 and 30 32, 33, 35 and 36 37, 38, 40 and 41 43, 44, 46 and 47 48 SYMBOL 1OE 1Y0 to 1Y3 GND VCC 2Y0 to 2Y3 3Y0 to 3Y3 4Y0 to 4Y3 4OE 3OE 4A3 to 4A0 3A3 to 3A0 2A3 to 2A0 1A3 to 1A0 2OE data outputs ground (0 V) positive supply voltage data outputs data outputs data outputs output enable input (active LOW) output enable input (active LOW) data inputs data inputs data inputs data inputs output enable input (active LOW) -40 to +85 C PINS 48 PACKAGE TSSOP
74AVCH16244
MATERIAL plastic
CODE SOT362-1
DESCRIPTION output enable input (active LOW)
2000 Mar 07
4
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
74AVCH16244
handbook, halfpage
nA0
nY0
handbook, halfpage
1OE 1 1Y0 1Y1 GND 1Y2 1Y3 VCC 2Y0 2Y1 2 3 4 5 6 7 8 9
48 2OE 47 1A0 46 1A1 45 GND 44 1A2 43 1A3 42 VCC 41 2A0 40 2A1 39 GND 38 2A2 37 2A3
nA1
nY1
nA2
nY2
nA3
nY3
nOE
MNA502
GND 10 2Y2 11 2Y3 12 3Y0 13 3Y1 14 GND 15 3Y2 16 3Y3 17 VCC 18 4Y0 19 4Y1 20 GND 21 4Y2 22 4Y3 23 4OE 24
MNA501
Fig.4 Logic symbol.
16244
36 3A0 35 3A1 34 GND 33 3A2 32 3A3 31 VCC 30 4A0 29 4A1 28 GND 27 4A2 26 4A3 25 3OE
handbook, halfpage
1 48 25 24 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26
1EN 2EN 3EN 4EN 1 1 2 3 5 6 12 8 9 11 12 13 13 14 16 17 14 19 20 22 23
MNA503
Fig.3 Pin configuration.
Fig.5 IEEE/IEC logic symbol.
2000 Mar 07
5
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER DC supply voltage CONDITIONS according to JEDEC Low Voltage Standards MIN. 1.4 1.65 2.3 3.0 for low-voltage applications VI VO Tamb tr, tf DC input voltage DC output voltage operating ambient temperature input rise and fall ratios output 3-state output HIGH or LOW state in free air VCC = 1.4 to 1.6 V VCC = 1.65 to 2.3 V VCC = 2.3 to 3.0 V VCC = 3.0 to 3.6 V 1.2 0 0 0 -40 0 0 0 0
74AVCH16244
MAX. 1.6 1.95 2.7 3.6 3.6 3.6 3.6 VCC +85 40 30 20 10 V V V V V V V V
UNIT
C ns/V ns/V ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO PARAMETER DC supply voltage DC input diode current DC input voltage DC output clamping diode current DC output voltage VI < 0 for inputs; note 1 VO < 0 output HIGH or LOW state; note 1 output 3-state; note 1 IO ICC, IGND Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 60 C the value of PD derates linearly with 5.5 mW/K. DC output sink current DC VCC or GND current storage temperature power dissipation per package for temperature range: -40 to +85 C; note 2 VO = 0 to VCC CONDITIONS - -0.5 - -0.5 -0.5 - - -65 - MIN. -0.5 MAX. +4.6 -50 +4.6 -50 V mA V mA UNIT
VCC + 0.5 V +4.6 50 100 +150 500 V mA mA C mW
2000 Mar 07
6
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
DC CHARACTERISTICS Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL VIH PARAMETER OTHER HIGH-level input voltage VCC (V) 1.2 1.4 to 1.6 2.3 to 2.7 3.0 to 3.6 VIL LOW-level input voltage 1.2 1.4 to 1.6 2.3 to 2.7 3.0 to 3.6 VOH HIGH-level output voltage VI = VIH or VIL IO = -100 A IO = -3 mA IO = -4 mA IO = -8 mA IO = -12 mA VOL LOW-level output voltage VI = VIH or VIL IO = 100 A IO = 3 mA IO = 4 mA IO = 8 mA IO = 12 mA II Ioff IIHZ/IILZ input leakage current per pin power-off leakage current input current for common I/O pins 3-state output OFF-state current quiescent supply current bus-hold LOW sustaining current VI = VCC or GND VI or VO = 3.6 V VI = VCC or GND 1.65 to 3.6 1.4 1.65 2.3 3.0 1.4 to 3.6 0 1.4 to 3.6 - - - - - - - - GND 0.22 0.24 0.38 0.53 0.1 0.1 0.1 1.65 to 3.6 1.4 1.65 2.3 3.0 VCC - 0.20 VCC - 0.35 VCC - 0.45 VCC - 0.55 VCC - 0.70 VCC MIN. VCC 0.65 x VCC 1.7 2.0 - - - - - 0.9 0.9 1.2 1.5 - 0.9 0.9 1.2 1.5
74AVCH16244
Tamb = -40 to +85 C TYP.(1) - - - - - GND 0.35 x VCC 0.35 x VCC 0.7 0.8 - - - - - 0.20 0.35 0.45 0.55 0.70 2.5 10 12.5 MAX.
UNIT V V V V V V V V V V V V V V V V V V V V A A A
1.65 to 1.95 0.65 x VCC
1.65 to 1.95 -
VCC - 0.21 VCC - 0.25 VCC - 0.37 VCC - 0.47
IOZ
VI = VIH or VIL; VO = VCC or GND
1.4 to 2.7 3.0 to 3.6
- - - - 25 45 75
0.1 0.1 0.1 0.2 - - -
5 10 20 40 - - -
A A A A A A A
ICC IBHL
VI = VCC or GND; IO = 0 1.4 to 2.7 3.0 to 3.6 VI = 0.35 x VCC VI = 0.7 V VI = 0.8 V 1.65 2.3 3.0
2000 Mar 07
7
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
TEST CONDITIONS SYMBOL IBHH PARAMETER OTHER bus-hold HIGH sustaining current bus-hold LOW overdrive current bus-hold HIGH overdrive current VI = 0.65 x VCC VCC (V) 1.65 2.3 3.0 1.95 2.7 3.6 1.95 2.7 3.6 MIN. -25 -45 -75 200 300 450 -200 -300 -450 - - - - - - - - -
74AVCH16244
Tamb = -40 to +85 C TYP.(1) - - - - - - - - - MAX. A A A A A A A A A
UNIT
IBHLO
IBHHO
Note 1. All typical values are measured at Tamb = 25 C. AC CHARACTERISTICS GND = 0 V; tr = tf 2.0 ns. TEST CONDITIONS SYMBOL tPHL/tPLH PARAMETER WAVEFORMS propagation delay; nAn to nYn see Figs 6 and 8 VCC (V) 1.2 - 1.40 to 1.60 - 1.65 to 1.95 0.8 2.3 to 2.7 3.0 to 3.6 tPZH/tPZL 3-state output enable time; nOE to nYn see Figs 7 and 8 1.2 0.7 0.6 - MIN. Tamb = -40 to +85 C TYP.(1) 5.2 2.9 2.1 1.5 1.3 5.7 4.0 3.3 2.2 1.9 5.9 4.2 3.7 1.9 2.2 - - 3.4 2.2 2.0 - - 6.8 4.0 3.5 - - 6.2 4.3 3.5 MAX. ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns UNIT
1.40 to 1.60 - 1.65 to 1.95 1.3 2.3 to 2.7 3.0 to 3.6 0.9 0.7 -
tPHZ/tPLZ
3-state output disable time; nOE to nYn
see Figs 7 and 8
1.2
1.40 to 1.60 - 1.65 to 1.95 1.6 2.3 to 2.7 3.0 to 3.6 1.0 1.1
Note 1. All typical values are measured at Tamb = 25 C and at VCC respectively 1.2, 1.5, 1.8, 2.5 and 3.3 V.
2000 Mar 07
8
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
AC WAVEFORMS
74AVCH16244
handbook, halfpage VI
nAn input GND
VM
t PHL VOH nYn output VOL VM
t PLH
MNA504
VCC 2.3 to 2.7 V 3.0 to 3.6 V
VM 0.5 x VCC 0.5 x VCC VCC VCC
VI
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 The input (nAn) to output (nYn) propagation delay.
handbook, full pagewidth
VI nOE input GND t PLZ VCC output LOW-to-OFF OFF-to-LOW VOL t PHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled VY VM VM VX t PZH t PZL VM
outputs disabled
outputs enabled
MNA478
VCC 2.3 to 2.7 V 3.0 to 3.6 V
VM 0.5 x VCC 0.5 x VCC
VX VOL + 0.15 V VOL + 0.3 V
VY VOH - 0.15 V VOH - 0.3 V VCC VCC
VI
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 The 3-state enable and disable times.
2000 Mar 07
9
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
74AVCH16244
handbook, full pagewidth
S1 VCC PULSE GENERATOR VI D.U.T. RT CL R load VO R load
2 x VCC open GND
MNA505
VCC (V) 1.2 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 open 2 x VCC GND 1.4 to 1.6 1.65 to 1.95 2.3 to 2.7 3.0 to 3.6
VI VCC VCC VCC VCC VCC
Rload 2000 2000 1000 500 500
CL 15 pF 15 pF 30 pF 30 pF 30 pF
Fig.8 Load circuitry for switching times.
2000 Mar 07
10
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
PACKAGE OUTLINE TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
74AVCH16244
SOT362-1
D
E
A X
c y HE vMA
Z
48
25
Q A2 A1 pin 1 index Lp L (A 3) A
1
e bp
24
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions). UNIT mm A max. 1.2 A1 0.15 0.05 A2 1.05 0.85 A3 0.25 bp 0.28 0.17 c 0.2 0.1 D (1) 12.6 12.4 E (2) 6.2 6.0 e 0.5 HE 8.3 7.9 L 1 Lp 0.8 0.4 Q 0.50 0.35 v 0.25 w 0.08 y 0.1 Z 0.8 0.4 8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT362-1 REFERENCES IEC JEDEC MO-153 EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-10 99-12-27
2000 Mar 07
11
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. Manual soldering
74AVCH16244
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
2000 Mar 07
12
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
Suitability of surface mount IC packages for wave and reflow soldering methods
74AVCH16244
SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
2000 Mar 07
13
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
NOTES
74AVCH16244
2000 Mar 07
14
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant; 3-state
NOTES
74AVCH16244
2000 Mar 07
15
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
245004/01/pp16
Date of release: 2000
Mar 07
Document order number:
9397 750 06759

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